Reducing PCB checking time - Keeping to the rules
Constraint Driven PCB Design
The explosion in new “gadgets” with increased functionality has required an equal increase in innovation within the electronics industry. The need to make everything smaller, faster and with greater capacity has driven not only the ‘chip’ industry to deliver System On Chip (SOC) solutions but has also forced the hardware engineer to a mixed technology single board solution; designs are simply becoming more and more complex.
The challenge for the design team is to deliver the product on time while performing to specification. Whether this is achieved by rapid prototyping or using virtual prototyping there is a strong focus on developing a design that not only performs as required but also ticks all the boxes during the manufacturing process.
The PCB layout process has always had to satisfy the design and manufacturing requirements imposed. Historically requirements or constraints have been passed using word of mouth or by pieces of paper created by the electronics engineer. Checking the design was a manual process and prone to error; however the task was easier as the designs were less complex, with a lot less components.
Today, ECAD tools support the design team in not only defining schematics and layout but also in component selection through CIS systems, functional simulation, signal integrity simulation and for manufacturing data checking; but with all this additional capability it still requires someone to interpret the results. The majority of ECAD systems have an automated approach to solve this data explosion and comes in the form of constraints management.
The article explores the history of constraint layout through to the present day showing the advantages of exploiting the ECAD systems built-in constraints functionality especially when applied to high-speed digital design.
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